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Computer Architecture - Part 2
1
of
25
💡
Hints:
3
Q1. The amount of times your CPU can complete the fetch-decode-execute cycle is known as
A. The clock speed
B. The number of cores
C. The cache
D. The RAM
Q2. If the number of cores goes up from r 2 to 4 - what is the exact effect on pearformance? (1-4)
A. Performance decreases
B. The maximum number of instructions executed per second is halved
C. The maximum number of instructions executed per second quadruples
D. The maximum number of instructions executed per second doubles
Q3. With which instruction set is more RAM needed to store the assembly instructions?
A. CISC
B. RISC
Q4. Two processors A and B have clock frequencies of 700 Mhz and 900 Mhz respectively. Suppose A can execute an instruction with an average of 3 steps and B can execute with an average of 5 steps. For the execution of the same instruction which processor is faster?
A. A
B. B
C. Both take the same time
D. Insufficient information
Q5. Where are the results of calculations stored?
A. Accumulator
B. ALU
C. MDR
D. CIR
Q6. ISP stands for
A. Instruction Set Processor
B. Information Standard Processing
C. Interchange Standard Protocol
D. Interrupt Service Procedure
Q7. What does the Accumulator do?
A. Stores the data retrieved from memory
B. Stores the address of the memory location to access
C. Stores the address of the next instruction
D. Stores the results of arthimetic and logical operations
Q8. A machine code instruction is shown here. Which part of the instruction represents the OPERAND?
×
A. Part A
B. Part B
C. Part C
D. Part D
Q9. Multi processors and multi cores is the same
A. Yes
B. depends on UMA or NUMA
C. No
Q10. Which of the following is not a register?
×
A. CU
B. MAR
C. MDR
D. PC
Q11. In computers, subtraction is carried out generally by
A. 1’s complement method
B. 2’s complement method
C. signed magnitude method
D. BCD subtraction method
Q12. Which part of the CPU will send signals to the memory, ALU and the input/output devices?
A. ALU
B. Control Unit
C. Memory Address Register (MDR)
D. Memory Data Register (MDR)
Q13. Which of the following memories below is often used in typical computer operation?
A. FDD
B. HDD
C. DRAM
D. None of these
Q14. What is the most durable?
A. Magnetic Tape
B. Solid State Drive
C. Hard Drive
D. CD
Q15. The clock rate of the processor can be improved by
A. Improving the IC technology of the logic circuits
B. Reducing the amount of processing done in one step
C. By using the overclocking method
D. All of the mentioned
Q16. What is RISC?
A. Risk Instruction Set Computing
B. Reduced Instruction Set Computing
C. Rhino in someones car
D. Ready Instruction Set Computing
Q17. A time quantum is allocated to each process in
A. Shortest Job First scheduling
B. Round Robin scheduling
C. Priority scheduling
D. Multilevel Queue scheduling
Q18. What is the program counters job?
A. To count the programs
B. It contains the memory address of the next instruction to be loaded
C. It stores instructions
D. It carries out the calculations
Q19. Super computer is powerful than Servers
A. True
B. False
Q20. More cores mean?
A. It will double in speed.
B. The computer will run twice as fast in a dual core.
C. The speed of the computer will definitely increase.
D. Separate cores can work on 2 or more tasks at the same time
Q21. In hexadecimal, what would be the next value of the Program Counter after 0x09 if it was incremented?
A. 0x0A
B. 0x10
C. 0xA0
D. 0xFF
Q22. It is the most important part of a computer, the component around which everything else is centered.
A. Processor
B. Proccesor
C. Proccessor
D. Proccesor
Q23. What is systems architecture?
A. Conceptual model that defines the structure, behaviour, and more views ofasystem
B. Conceptual model that defines the structure of a buildings system
C. A blueprint of a a building
D. A system which needs to be replaced and updated
Q24. File Allocation Table (FAT) is a ___ scheme for disk blocks allocation
A. contiguous
B. linked
C. indexed (with linked index blocks)
D. indexed (with multilevel index blocks)
Q25. Which of the register/s of the processor is/are connected to Memory Bus?
A. PC
B. MAR
C. IR
D. Both PC and MAR
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